The present invention relates to a semiconductor integrated circuit device using an SOI (Silicon-On-Insulator) substrate.
Recently, with development of device miniaturization techniques, a device called a single electron device such as a single electron transistor, which uses a charging effect of one electron, has been manufactured (for example, IEEE Trans. Magnetics Vol. MAG-23 pp. 1142-1145), and much attention has been paid to this device. The single electron device is an ultimate electronic device wherein one electron will be controlled, and it has an excellent feature of very low power consumption.
The minimum unit of the single electron transistor is a conductor island having two small tunnel junctions, and a current flowing across the junctions is controlled by an external potential capacitively coupled to the island. More specifically, a potential Vext of an external electrode which is capacitively coupled to a conductor island by capacitance Cext varies by about e/Cext. Thereby, the flow of electrons is turned on/off. When the sum of the capacitance viewed from the conductor island is C, an output voltage variation obtained by the single electron device and an applicable power supply voltage are about e/C, respectively. However, since the magnitude of C, which is obtainable, is on the order of 10 aF, the voltage variation which can be obtained is at most several mV. If the design dimensions are reduced to about 1/10 or less, the voltage variation increases about 100 times or more. Even in consideration of modern miniaturization techniques, however, it appears very difficult to increase the output voltage over 100 mV. Single electron devices include, for example, so-called single electron transistors, turnstile devices, and devices having tunnel junctions arrayed one-or two-dimensionally. The single electron device is a generic name of devices having small tunnel junctions and utilizing an electron charging effect.
As has been described above, although the single electron device has an excellent feature of very low power consumption, the magnitude of a signal to be treated is much smaller than that in a conventional CMOS. Moreover, the tolerance for noise is strictly limited. Besides, only a power supply voltage of about several mV can be applied.
On the other hand, an MOS type field-effect transistor formed on a thin-film SOI has excellent sub-threshold characteristics and thus a threshold voltage can be decreased. In this transistor, a parasitic capacitance is small because of its structure. Furthermore, since a variation in threshold voltage due to a substrate bias voltage is small, the operation at low power-supply voltage is stabilized. Accordingly, a MOS type field-effect transistor (MOSFET) fabricated on the thin-film SOI has higher current drive and operational stability at low voltages than a MOSFET fabricated on a bulk Si. The MOSFET on the thin-film SOI is widely considered as a prospective next-generation device structure with low power consumption and high operation speed.
However, in the case of the MOSFET fabricated on the thin-film SOI, many problems are caused by a substrate floating effect, e.g. a power-supply voltage cannot be raised because of a degradation in source-drain breakdown voltage due to a latch-up caused by the substrate floating effect. It is known, in particular, that the degradation in source-drain breakdown voltage is very considerable in the nMOSFET.
As has been described above, a power-supply voltage of several mV is used in the single electron transistor and a power-supply voltage of about 1 to 2 V is used in the MOSFET on the thin-film SOI, while a power-supply voltage of about 3.3 V is generally adopted in the currently used CMOS, etc. In the 0.1 .mu.m generation, it is expected that the power-supply voltage will be 1 V, but this value is far from the power-supply voltage of the single electron transistor.
The single electron device, as described above, is an ultimate device using fine processing techniques, and it can be operated with low power consumption. However, the amplitude of the signal treated in the single electron transistor is much smaller than that treated in the conventional CMOS, and therefore the tolerance for noise is much lower than that in CMOS. Besides, the single electron transistor has a disadvantage in that the power-supply voltage of the single electron transistor is much lower than that in the conventional CMOS.
On the other hand, the MOSFET fabricated on the thin-film SOI has excellent features of high-speed operations and lower power consumption. However, since the source-drain breakdown voltage deteriorates, a relatively lower voltage, as compared to the conventional CMOS, needs to be used as power-supply voltage. In particular, the source-drain breakdown voltage of the nMOS is more deteriorated than that of the pMOS.